Referring to FIG. 1, which is labeled “Prior Art”, known semiconductor power circuits comprising multiple semiconductor dies 10 are connected electrically in parallel between flat conductors 12 and 14 by means of bonded wires 16. The bottom surfaces of the semiconductor dies 10 are soldered to the top contact surface of the inner conductor 12. Wires 16 are used to connect the opposite electrodes of the semiconductor devices 10 to the surrounding legs 18 and 20 of the second conductor 14, the legs 18 and 20 being positioned around the outside ledges of the conductor 12 in order to be in proximity to the devices 10 thereby to shorten the length of the wires 16. A printed circuit board 22 carrying components and connectors for control purposes is disposed between the semiconductor dies 10.
The prior art arrangement shown in FIG. 1 has a number of disadvantages. The primary disadvantages arise out of the wires 16 as well as the bonding process and include substantially increased electrical resistance in the overall circuit as well as the costs and manufacturing difficulties inherently associated with the wire bonding operation. The increased resistance leads to higher levels of wasted power and lower electrical efficiencies as well as shortened life of the components. In addition, the geometry of the package including the surrounding legs 18 and 20 of the second conductor 14 creates a package of substantial width.